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[原创] NXP K32L3A6超低功耗双核ARM MCU应用方案

关键词:ARM Cortex-M4 MCU ARM Cortex-M0+ MCU 工业控制 物联网(IoT)

时间:2019-11-20 11:14:35       来源:中电网

nxp公司的K32L3A6是72MHz ARM Cortex-M0+/M4F双核微控制器(MCU),集成了高达128KB闪存和384KB SRAM,特别适合需要高性能Cortex-M4F处理器运行应用而高效的Cortex-M0+处理器则运行低功耗应用如传感器数据收集和进行不需要满功率M4核的低水平运行如各种工业和IoT应用.K32 L3 MCU系列提供了新的功能如低漏电优化的外设,DC/DC转换器以及安全特性如认证启动,安全升级和篡改检测引脚.器件具有80位单独身份号码, 高级闪存安全和访问控制,具有可编发生器多项式的16位或32位硬件CRC,低功耗密码加速单元(CAU3)支持AES128/196/256, DES/3DES, SHA 256, RSA和ECC PK-256/Curve25519,真正随机号码产生器,有多达4个抗篡改检测引脚.器件核电压1.14V-1.45V,降压DC/DC转换器电压2.1V-3.6V,1 x 32路FlexIO支持UART,I2C,SPI,I2S照相机IF,LCD RGB,PWM/波形发生器的仿真,4个低功耗UART(LPUART),4个低功耗I2C(LPI2C)模块支持高达1Mbps,4x16位低功耗SPI(LPSPI)支持高达24Mbps,1个EMVSIM模块支持ISO-7816协议,1个串行音频接口(SAI)支持I2S和AC’97,1个安全数字硬件控制器(uSDHC).本文介绍了K32L3A6主要特性,框图,时钟架构框图和开发板FRDM-K32L3A6技术和功能指标,电路图和PCB设计图.

72 MHz Arm? Cortex?-M0+/M4F Dual Core Microcontrollerwith up to 1280 KB Flash and 384 KB SRAM.The K32L3A family of devices is an ultra-low-power, dual coresolution ideal for applications that require a high performanceCortex-M4F processor to run the application and an efficientCortex-M0+ to run low power operations such as sensor data collection and perform low level operations that don’t need thefull power of the M4 core.

Building on the successful Kinetis K Series (K22 and K24), the K32 L3 family of MCUs delivers a 50% improvement in power optimization and security advancements to address a wide range of industrial and IoT applications. The K32 L3 MCU family is based on the power-efficient Arm® Cortex® -M4 core and offers an Cortex-M0+, providing new enhancements such as low-leakage power-optimized peripherals, a DC-DC converter, and security features like authenticated boot, secure update and tamper detection pins.

The introduction of the K32 L3 MCU family is the start of a long line of MCUs, which will further advance NXP’s security capabilities and power optimization features to lead the market in the next generation of low-leakage applications. The K32 L3 MCU family is complemented by a comprehensive ecosystem including MCUXpresso software and tools and a Freedom development board for easy prototyping.

K32L3A6主要特性:

Core Processor
• Arm Cortex-M4F core up to 72 MHz (high-speed run up to72 MHz) for application code
• Arm Cortex-M0+ core up to 72 MHz (high-speed run up to72 MHz) for low power operations
Memories
• 1.25 MB program flash memory, 1 MB on the M4F domainand 256 KB on the M0+ domain
• 384 KB SRAM, 256 KB on the M4F domain and 128 KB onthe M0+ domain
• 48 KB ROM with built-in bootloader
• 32 B system register file and 32 B RTC register file
• External bus interface (FlexBUS) for off-chip memoryexpansion
Clocks
• Low-Power Frequency-Locked Loop (LPFLL)
• Range 1: 48 MHz
• Range 2: 72 MHz
• Internal Resistance-Capacitance Oscillators (IRCs)
• Fast-Speed IRC (48, 52, 56, 60 MHz)
• Slow-Speed IRC (8 MHz or 2 MHz)
• Low Power Oscillator (LPO - 1 kHz)
• Real Time Clock Oscillator (RTCOSC)
• System Clock Generation
System
• Dual Direct Memory Access (DMA) controllers withasynchronous capability
• M4F: 16 channels, 64 inputs per channel
• M0+: 8 channels, 32 inputs per channel
Timers
• 2 x 6 ch., 2 x 2 ch. Timer PWM Modules (TPM)
• 2 x 4 ch. Low Power Programmable InterruptTimer (LPIT)
• 3 Low Power Timer (LPTMR)
• Real Time Clock (RTC)
• One 56-bit Time stamp
Security and Integrity
• 80-bit unique identification number per chip
• Advanced Flash security and access control
• 16-bit or 32-bit Hardware CRC withprogrammable generator polynomial
• Low-power Cryptographic Acceleration Unit(CAU3) supporting AES128/196/256, DES/3DES, SHA 256, RSA and ECC PK-256/Curve25519
• True Random Number Generator
• Up to 4 active anti-tamper detection pins
Analog
• 1 x 12-bit single ended low-power ADC
• 2 x Low power comparator (LPCMP) eachcontaining a 6-bit DAC and programmable reference input
• 1 x 12-bit low power digital-to-analog converter(LPDAC)
• 1 x 1.2V/2.1V dual-range VREF
Peripherals
• 1 x Universal Serial Bus (USB) 2.0 Full Speed(FS) controller with integrated hardware
transceiver, 5 V regulator and 2 KB USB RAM
• Two internal Watchdog and one external Watchdog Monitor
• Low-leakage wakeup unit
• JTAG and Serial Wire Debug, version 2.0, programming anddebug interface with multi-drop capability
• Trace Features for M4F
• Cross Trigger Interface
• Embedded Trace Macrocell
• Trace Port Interface Unit
• Trace Features for M0+
• Cross Trigger Interface
• Micro Trace Buffer
• Breakpoint and Watchpoint Unit
• Nested Vectored Interrupt Controller
• Memory Protection Unit
• Extended Resource Domain Controller
Power Management
• Bypass mode: 1.71 V to 3.6 V
• Buck DC-DC converter: 2.1 V to 3.6 V
• Core voltage bypass: 1.14 V to 1.45 V direct supply to core,bypassing internal regulator
• Independent VDDIO1 and VDDIO2 supply: 1.71 V to 3.6 V
• Independent VBAT(RTC): 1.71 V to 3.6 V
• 1 x 32 ch.FlexIO supporting emulation ofUART, I2C, SPI, I2S, Camera IF, LCD RGB,PWM/Waveform generation
• 4 x low power UART (LPUART)
• 4 x low power I2C (LPI2C) modules supportingup to 1 Mbps
• 4 x 16-bit low power SPI (LPSPI) supportingup to 24 Mbps
• 1 x EMVSIM module supporting ISO-7816 protocol
• 1 x Serial Audio Interface (SAI) with support forI2S and AC’97
• 1 x Secure Digital Hardware Controller(uSDHC)
I/O
• 104 General-purpose input/output pins (GPIO)
Packages
• 176 VFBGA 9mm x 9mm x 0.86mm, 0.5mmpitch, -40℃ to 105℃

图1.K32L3A6框图

图2.K32L3A6时钟架构框图

开发板FRDM-K32L3A6

The FRDM-K32L3A6 development board consists of the K32L3A6 device with a 32-Mbit external serial flash, FXOS8700 accelerometer/magnetometer, visible light sensor, SDHC circuit, general purpose LEDs, and general purpose push buttons in the popular Freedom board form-factor.

图3.开发板FRDM-K32L3A6外形图

开发板FRDM-K32L3A6技术和功能指标:

K32L3A60VPJ1A

72 MHz Arm® Cortex®-M4 and Cortex-M0
1.25 MB Flash
384B SRAM
Secure boot/update capability

Power Management

Four selectable power sources including USB connector
DC-DC converter with Buck and Bypass operation modes
Jumpers and trace cuts enable accurate core current measurements

USB

Full-speed USB module with device capability and built-in transceiver

Secure Digital Host Controller (SDHC)

SDHC card slot supported

Serial Flash Memory

4 MB serial flash memory with SPI interface

Accelerator + Magnetometer Combo Sensor

Six-axis accelerometer with integrated magnetometer

Visible Light Sensor

Phototransistor connected to the ADC input channel for evaluating the ADC

User Application LEDs

One RGB LED and one red LED controlled by GPIO

OpenSDA serial and debug

Includes an open-source hardware design, an open-source DAPLink bootloader, and debug CMSIS-DAP interface software and bridges serial and debug communications between USB host and an embedded target processor



 

 

 

 

 






















图4.开发板FRDM-K32L3A6电路图(1)

图5.开发板FRDM-K32L3A6电路图(2)

图6.开发板FRDM-K32L3A6电路图(3)

图7.开发板FRDM-K32L3A6电路图(4)

图8.开发板FRDM-K32L3A6电路图(5)

图9.开发板FRDM-K32L3A6电路图(6)

图10.开发板FRDM-K32L3A6电路图(7)

图11.开发板FRDM-K32L3A6 PCB设计图
详情请见:


K32L3A.pdf
FRDM-K32L3A6-SCH.pdf
FRDM-K32L3A6-DF-B.zip

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